The semiconductor integrated circuit (IC) industry has experienced rapid growth. Technological advances in IC materials and design have produced generations of ICs where each new generation has smaller and more complex circuits than the previous generation. However, these advances have increased the complexity of processing and manufacturing ICs and, for these advances to be realized, similar developments in IC processing and manufacturing are needed. In the course of integrated circuit evolution, functional density (i.e., the number of interconnected devices per chip area) has generally increased while geometry size (i.e., the smallest component or line that can be created using a fabrication process) has decreased. This scaling-down process generally provides benefits by increasing production efficiency and lowering associated costs. Such scaling down also produces a relatively high power dissipation value, which may be addressed by using low power dissipation devices such as complementary metal-oxide-semiconductor (CMOS) devices.
Due to this scaling down trend, common manufacturing tasks have become more difficult, for instance, due to high aspect ratios. As one example, one approach to improve the electrical connections between source and drain regions and associated source and drain contacts has been to perform a silicidation process on the source and drain regions through the source and drain contact holes before they are filled with contact metal. However, this through-contact-hole silicidation process may be more difficult and less successful when the contact holes have a high aspect ratio. Thus, although these approaches have been satisfactory for their intended purpose, they have not been satisfactory in all respects.